High-speed Demonstration of Bit-serial SFQ-based Computing for Integer Iteration Algorithms


徐 秋韵, 山梨 裕希, 吉川 信行 (横浜国大)


Abstract:With tremendous high-energy efficiency, when compared to CMOS technology, SFQ logic families comprise a promising perspective in solving complex mathematical problems, which require numerous periodic computations while the algorithm itself is simple. Among those unsolved mathematic conjectures, we investigate the 3n+1 problem, which is to take any natural number n and develop a series of repeated iterations, and no matter which number initiates the sequence, the outcome will be 1. We use this example to demonstrate an SFQ-based computing system with a processor and memories, and to evaluate the energy efficiency of the system. In the present study, we designed and implemented an SFQ-based computing system for solving the 3n +1 problem by using the AIST 10 kA/cm2 advanced Nb process. The system consists of a central processor, two 16-bit register files and a high-frequency clock generator. The maximum clock frequency and the total power consumption of the designed system are 90 GHz and 0.85 mW, respectively. In the previous study, we showed the correct operation of the system, and in this paper, we demonstrate the high-speed test results of this system.